Fujitsu FR family 32-bit microcontroller instruction manue Instrukcja Użytkownika Pobierz pdf (Strona 150)

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CHAPTER 7 DETAILED EXECUTION INSTRUCTIONS

7.37 MULUH (Multiply Unsigned Half-word Data)

Multiplies the half-word data in the lower 16 bits of "Rj" by the half-word data in the

lower 16 bits of "Ri" as unsigned numbers, and stores the resulting unsigned 32-bit

data in the multiplication/division register (MDL).

The multiplication/division register (MDH) is undefined.

■ MULUH (Multiply Unsigned Half-word Data)

Assembler format: MULUH Rj, Ri

Operation: Rj × Ri → MDL

Flag change:

N: Set when the MSB of the "MDL" of the operation result is "1", cleared when the MSB is "0".

Z: Set when the "MDL" of the operation result is "0", cleared otherwise.

V: Unchanged

C: Unchanged

Execution cycles: 3 cycles

Instruction format:

NZVC

CC– –

MSB LSB

10111011 Rj Ri

1 2 ... 145 146 147 148 149 150 151 152 153 154 155 ... 313 314

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